Re: [BLACKBOX] Project Oberon - Oberon day videos

From: [at]} <Wojtek>
Date: Sat, 18 Feb 2012 16:58:08 -0500

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> Yes. Niklaus Wirth and Paul Reed have implemented it on Wirth's own RISC
> computer design which has been implemented on FPGA, using Verilog on a
> Xilinx Spartan-3 development board. They also have it running on a
> virtualised PC.

It starts being interesting. One of outstanding problems with FPGA
"programming" (which is not programming at all) is a high level of
difficulty for average mortals. One of the solutions is embedding a
processor core inside the FPGA and cast the problem back into the
sequential domain. The problem is, that this solution is quickly evolving
into a nightmare of its own. Perhaps Wirth with his "make it as simple as
possible, but no simpler" has found a proper balance?

I am using Spartan-6 in my designs. So it may be relevant.

> They described their work on this at the Oberon Day 2011 in Zurich in May
> last year. The video can be viewed on the website at:
>
> http://www.oberonday2011.ethz.ch/

Thank you!

W.

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Received on Sat Feb 18 2012 - 22:58:08 UTC